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67

ISSS
1996
IEEE

103views Hardware» more ISSS 1996»

Instruction Set Design and Optimizations for Address Computation in DSP Architectures

15 years 1 months ago

In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...

Guido Araujo, Ashok Sudarsanam, Sharad Malik

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71

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FGCS
2000

100views more FGCS 2000»

Investigating the application of web-based simulation principles within the architecture for a next-generation computer generate

14 years 9 months ago

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With a heavy emphasis on distribution and reuse, web-based simulation portends a dramatic shift in the application of simulation as a problem-solving technique and decision-suppor...

Ernest H. Page, Jeffrey M. Opper

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78

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ISVLSI
2002
IEEE

104views VLSI» more ISVLSI 2002»

Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation

15 years 2 months ago

Download islab.oregonstate.edu

Modular inverse computation is needed in several public key cryptographic applications. In this work, we present two VLSI hardware implementations used in the calculation of Montg...

Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, &Ccedi...

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82

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JETAI
2007

131views more JETAI 2007»

A computational architecture for heterogeneous reasoning

14 years 9 months ago

Download reference.kfupm.edu.sa

Reasoning, problem solving, indeed the general process of acquiring knowledge, is not an isolated, homogenous affair involving a one agent using a single form of representation, b...

Dave Barker-Plummer, John Etchemendy

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71

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HICSS
2009
IEEE

114views Biometrics» more HICSS 2009»

GrayWulf: Scalable Clustered Architecture for Data Intensive Computing

15 years 4 months ago