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VLSID
2002
IEEE
98views VLSI» more  VLSID 2002»
16 years 4 months ago
On Test Scheduling for Core-Based SOCs
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
Sandeep Koranne
VLSID
2002
IEEE
131views VLSI» more  VLSID 2002»
16 years 4 months ago
Divide-and-Conquer IDDQ Testing for Core-Based System Chips
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
C. P. Ravikumar, Rahul Kumar
CADE
2002
Springer
16 years 4 months ago
The Quest for Efficient Boolean Satisfiability Solvers
The classical NP-complete problem of Boolean Satisfiability (SAT) has seen much interest in not just the theoretical computer science community, but also in areas where practical s...
Lintao Zhang, Sharad Malik
OSDI
2008
ACM
16 years 4 months ago
Improving MapReduce Performance in Heterogeneous Environments
MapReduce is emerging as an important programming model for large-scale data-parallel applications such as web indexing, data mining, and scientific simulation. Hadoop is an open-...
Matei Zaharia, Andy Konwinski, Anthony D. Joseph, ...
VLDB
2007
ACM
179views Database» more  VLDB 2007»
16 years 4 months ago
Mining Approximate Top-K Subspace Anomalies in Multi-Dimensional Time-Series Data
Market analysis is a representative data analysis process with many applications. In such an analysis, critical numerical measures, such as profit and sales, fluctuate over time a...
Xiaolei Li, Jiawei Han
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