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» Computer aided analysis and design of power transformers
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IPPS
2009
IEEE
15 years 8 months ago
Using hardware transactional memory for data race detection
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
Shantanu Gupta, Florin Sultan, Srihari Cadambi, Fr...
ICCAD
2003
IEEE
109views Hardware» more  ICCAD 2003»
15 years 10 months ago
Large-Scale Circuit Placement: Gap and Promise
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie,...
ISPD
2006
ACM
175views Hardware» more  ISPD 2006»
15 years 7 months ago
mPL6: enhanced multilevel mixed-size placement
The multilevel placement package mPL6 combines improved implementations of the global placer mPL5 (ISPD05) and the XDP legalizer and detailed placer (ASPDAC06). It consistently pr...
Tony F. Chan, Jason Cong, Joseph R. Shinnerl, Kent...
SLIP
2005
ACM
15 years 7 months ago
Congestion prediction in early stages
Routability optimization has become a major concern in the physical design cycle of VLSI circuits. Due to the recent advances in VLSI technology, interconnect has become a dominan...
Chiu-Wing Sham, Evangeline F. Y. Young
AIS
2007
Springer
15 years 1 months ago
Crafts praxis for critical wearables design
This paper treats the contemporary craft market as an under-researched resource for wearable computing, and investigates the alternative values and experiences that contemporary c...
Sarah Kettley