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» Computer aided analysis and design of power transformers
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ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
15 years 6 months ago
Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Pin...
CODES
2007
IEEE
15 years 5 months ago
Pointer re-coding for creating definitive MPSoC models
Today's MPSoC synthesis and exploration design flows start abstract input specification model captured in a system level design language. Usually this model is created from a...
Pramod Chandraiah, Rainer Dömer
IEEEPACT
2008
IEEE
15 years 7 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...
VEE
2012
ACM
187views Virtualization» more  VEE 2012»
13 years 9 months ago
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
Dynamic Binary Translators (DBT) and Dynamic Binary Optimization (DBO) by software are used widely for several reasons including performance, design simplification and virtualiza...
Demos Pavlou, Enric Gibert, Fernando Latorre, Anto...
TMC
2012
13 years 3 months ago
E-MiLi: Energy-Minimizing Idle Listening in Wireless Networks
WiFi interface is known to be a primary energy consumer in mobile devices, and idle listening (IL) is the dominant source of energy consumption in WiFi. Most existing protocols, s...
Xinyu Zhang, Kang G. Shin