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GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 8 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
DAC
2004
ACM
16 years 4 months ago
Statistical timing analysis based on a timing yield model
Starting from a model of the within-die systematic variations using principal components analysis, a model is proposed for estimation of the parametric yield, and is then applied ...
Farid N. Najm, Noel Menezes
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 8 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
SBACPAD
2003
IEEE
102views Hardware» more  SBACPAD 2003»
15 years 8 months ago
Performance Analysis of DECK Collective Communication Service
Collective communication is very useful for parallel applications, especially those in which matrix and vector data structures need to be manipulated by a group of processes. This...
Rafael Ennes Silva, Delcino Picinin, Marcos E. Bar...
DAC
2006
ACM
15 years 9 months ago
Variation-aware analysis: savior of the nanometer era?
VLSI engineers have traditionally used a variety of CAD analysis tools (e.g. SPICE) to deal with variability. As we go into deep sub micron issues, the analysis is becoming harder...
Sani R. Nassif, Vijay Pitchumani, N. Rodriguez, De...