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DAC
2007
ACM
16 years 4 months ago
TROY: Track Router with Yield-driven Wire Planning
In this paper, we propose TROY, the first track router with yield-driven wire planning to optimize yield loss due to random defects. As the probability of failure (POF) computed f...
Minsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan
DAC
2003
ACM
16 years 4 months ago
Making cyclic circuits acyclic
Cyclic circuits that do not hold state or oscillate are often the most convenient representation for certain functions, such as arbiters, and can easily be produced inadvertently ...
Stephen A. Edwards
177
Voted
ISPDC
2008
IEEE
15 years 9 months ago
Performance Analysis of Grid DAG Scheduling Algorithms using MONARC Simulation Tool
This paper presents a new approach for analyzing the performance of grid scheduling algorithms for tasks with dependencies. Finding the optimal procedures for DAG scheduling in Gr...
Florin Pop, Ciprian Dobre, Valentin Cristea
DAC
2008
ACM
16 years 4 months ago
A progressive-ILP based routing algorithm for cross-referencing biochips
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
Ping-Hung Yuh, Sachin S. Sapatnekar, Chia-Lin Yang...
118
Voted
DAC
2005
ACM
16 years 4 months ago
Race-condition-aware clock skew scheduling
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...
Shih-Hsu Huang, Yow-Tyng Nieh, Feng-Pin Lu