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DAC
2004
ACM
16 years 18 days ago
2004
ACM
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
FPGA
2003
ACM
15 years 4 months ago
2003
ACM
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
DAC
2009
ACM
16 years 19 days ago
2009
ACM
Efficient system-level design is increasingly relying on hierarchical design-space exploration, as well as compositional methods, to shorten time-to-market, leverage design re-use...
DAC
2005
ACM
16 years 18 days ago
2005
ACM
ASIC provides more than an order of magnitude advantage in terms of density, speed, and power requirement per gate. However, economic (cost of masks) and technological (deep micro...