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ICCAD
2006
IEEE
183views Hardware» more  ICCAD 2006»
16 years 3 months ago
Soft error derating computation in sequential circuits
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Hossein Asadi, Mehdi Baradaran Tahoori
155
Voted
ACSD
2009
IEEE
139views Hardware» more  ACSD 2009»
16 years 1 months ago
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
Stephen B. Furber, Andrew D. Brown
SBCCI
2004
ACM
134views VLSI» more  SBCCI 2004»
15 years 11 months ago
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
Gabriella Trucco, Giorgio Boselli, Valentino Liber...
GECCO
2003
Springer
120views Optimization» more  GECCO 2003»
15 years 11 months ago
Multi-FPGA Systems Synthesis by Means of Evolutionary Computation
Abstract. Multi-FPGA systems (MFS) are used for a great variety of applications, for instance, dynamically re-configurable hardware applications, digital circuit emulation, and num...
José Ignacio Hidalgo, Francisco Ferná...
DATE
2010
IEEE
263views Hardware» more  DATE 2010»
15 years 11 months ago
SCOC3: a space computer on a chip
—This paper presents the definition of an integrated processor core ASIC named SCOC3 which is designed for space computers. It also presents the validation method that has led to...
Franck Koebel, Jean-François Coldefy