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119
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ICS
2004
Tsinghua U.
15 years 7 months ago
2004
Tsinghua U.
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...
138
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ICS
2004
Tsinghua U.
15 years 7 months ago
2004
Tsinghua U.
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
113
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ICALP
2003
Springer
15 years 6 months ago
2003
Springer
Abstract. In this paper we consider the problem of routing packets in dynamically changing networks, using the anycast mode. In anycasting, a packet may have a set of destinations ...
102
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ICS
2003
Tsinghua U.
15 years 6 months ago
2003
Tsinghua U.
Power consumption is a critical issue in interconnection network design, driven by power-related design constraints, such as thermal and power delivery design. Usually, off-line w...
189
Voted
Publication
Modern hardware description languages support code-generation constructs like generate/endgenerate in Verilog. These constructs are intended to describe regular or parameterized ha...