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DAC
2006
ACM
15 years 3 months ago
Clock buffer and wire sizing using sequential programming
This paper investigates methods for clock skew minimization using buffer and wire sizing. First, a technique that significantly improves solution quality and stability of sequent...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...
77
Voted
HICSS
2002
IEEE
109views Biometrics» more  HICSS 2002»
15 years 2 months ago
Embedding Self-Management and Generic Learning Support into Courseware Structures
Traditional Computer-Aided Teaching and Learning (CAT/CAL) environments in multimedia-based teleeducation do not empower knowledge consumers (trainees, students etc.) to practice ...
Andreas Auinger, Christian Stary
ISSS
2002
IEEE
130views Hardware» more  ISSS 2002»
15 years 2 months ago
System-Level Modeling of a Network Switch SoC
We present the modeling of the high-level design of a next generation network switch from the perspective of a ComputerAided Design (CAD) team within the larger context of a desig...
Andrew S. Cassidy, Christopher P. Andrews, Donald ...
DAC
2010
ACM
15 years 1 months ago
An AIG-Based QBF-solver using SAT for preprocessing
In this paper we present a solver for Quantified Boolean Formulas (QBFs) which is based on And-Inverter Graphs (AIGs). We use a new quantifier elimination method for AIGs, which...
Florian Pigorsch, Christoph Scholl
COST
2008
Springer
99views Multimedia» more  COST 2008»
14 years 11 months ago
From Extensity to Protensity in CAS: Adding Sounds to Icons
Abstract. Being aware of the gap between technological offers and user expectations, the paper aims to illustrate the necessity of anthropocentric designs ("user-pulled")...
Alina E. Lascu, Alexandru V. Georgescu