Sciweavers

102291 search results - page 19776 / 20459
» Computing
Sort
View
IMC
2003
ACM
15 years 10 months ago
On the correspondency between TCP acknowledgment packet and data packet
At the TCP sender side, the arrival of an ack packet always triggers the sender to send data packets, which establishes a correspondency between the arrived ack packet and the sen...
Guohan Lu, Xing Li
ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
15 years 10 months ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
15 years 10 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
ISLPED
2003
ACM
129views Hardware» more  ISLPED 2003»
15 years 10 months ago
A critical analysis of application-adaptive multiple clock processors
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
Emil Talpes, Diana Marculescu
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
15 years 10 months ago
Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Pin...
« Prev « First page 19776 / 20459 Last » Next »