Sciweavers

102291 search results - page 19942 / 20459
» Computing
Sort
View
CASES
2008
ACM
15 years 6 months ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano
CASES
2008
ACM
15 years 6 months ago
Active control and digital rights management of integrated circuit IP cores
We introduce the first approach that can actively control multiple hardware intellectual property (IP) cores used in an integrated circuit (IC). The IP rights owner(s) can remotel...
Yousra Alkabani, Farinaz Koushanfar
CASES
2008
ACM
15 years 6 months ago
Cache-aware cross-profiling for java processors
Performance evaluation of embedded software is essential in an early development phase so as to ensure that the software will run on the embedded device's limited computing r...
Walter Binder, Alex Villazón, Martin Schoeb...
CASES
2008
ACM
15 years 6 months ago
Reducing pressure in bounded DBT code caches
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
José Baiocchi, Bruce R. Childers, Jack W. D...
CAV
2008
Springer
122views Hardware» more  CAV 2008»
15 years 6 months ago
Thread Quantification for Concurrent Shape Analysis
In this paper we address the problem of shape analysis for concurrent programs. We present new algorithms, based on abstract interpretation, for automatically verifying properties ...
Josh Berdine, Tal Lev-Ami, Roman Manevich, G. Rama...
« Prev « First page 19942 / 20459 Last » Next »