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» Computing Models for FPGA-Based Accelerators
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ASAP
2007
IEEE
122views Hardware» more  ASAP 2007»
15 years 4 months ago
Parallelizing HMMER for Hardware Acceleration on FPGAs
Profile based Hidden Markov Model is a widely used tool in bioinformatics. While being very valuable to biologists, it is extremely compute intensive and suffers from prohibitive...
Steven Derrien, Patrice Quinton
CGA
1998
14 years 9 months ago
Images for Accelerating Architectural Walkthroughs
We are investigating methods to accelerate rendering of architectural walkthroughs. In this paper, we improve upon a cells and portals framework by using images to replace geometr...
Matthew M. Rafferty, Daniel G. Aliaga, Voicu Popes...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
15 years 4 months ago
Modeling and Synthesis of Hardware-Software Morphing
— In state of the art hardware-software-co-design flows for FPGA based systems, the hardware-software partitioning problem is solved offline, thus, omitting the great flexibil...
Dirk Koch, Christian Haubelt, Thilo Streichert, J&...
HPCA
2006
IEEE
15 years 10 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
SAC
2011
ACM
14 years 5 months ago
A quasi-Newton acceleration for high-dimensional optimization algorithms
Abstract In many statistical problems, maximum likelihood estimation by an EM or MM algorithm suffers from excruciatingly slow convergence. This tendency limits the application of ...
Hua Zhou, David Alexander, Kenneth Lange