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ALT
2003
Springer
16 years 5 days ago
Learning a Subclass of Regular Patterns in Polynomial Time
An algorithm for learning a subclass of erasing regular pattern languages is presented. On extended regular pattern languages generated by patterns π of the form x0α1x1 . . . α...
John Case, Sanjay Jain, Rüdiger Reischuk, Fra...
ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
16 years 5 days ago
Making register file resistant to power analysis attacks
— Power analysis attacks are a type of side-channel attacks that exploits the power consumption of computing devices to retrieve secret information. They are very effective in br...
Shuo Wang, Fan Zhang, Jianwei Dai, Lei Wang, Zhiji...
81
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ICCAD
2006
IEEE
112views Hardware» more  ICCAD 2006»
16 years 4 days ago
A new RLC buffer insertion algorithm
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
Zhanyuan Jiang, Shiyan Hu, Jiang Hu, Zhuo Li, Weip...
ICCAD
2004
IEEE
191views Hardware» more  ICCAD 2004»
16 years 4 days ago
Checking consistency of C and Verilog using predicate abstraction and induction
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...
Daniel Kroening, Edmund M. Clarke
ICCAD
2004
IEEE
147views Hardware» more  ICCAD 2004»
16 years 4 days ago
Interval-valued reduced order statistical interconnect modeling
9, IO]. However, unlike the case with static timing, it is not so easy We show how recent advances in the handling of correlated interval representations of range uncertainty can b...
James D. Ma, Rob A. Rutenbar
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