1192 search results - page 151 / 239 » Computing Weakest Readings |
145
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ICPP
2008
IEEE
15 years 10 months ago
2008
IEEE
On systems with multi-core processors, the memory access scheduling scheme plays an important role not only in utilizing the limited memory bandwidth but also in balancing the pro...
133
Voted
ICPP
2008
IEEE
15 years 10 months ago
2008
IEEE
An asynchronous work-stealing implementation of dynamic load balance is implemented using Unified Parallel C (UPC) and evaluated using the Unbalanced Tree Search (UTS) benchmark ...
130
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ICPP
2008
IEEE
15 years 10 months ago
2008
IEEE
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
153
Voted
RTCSA
2008
IEEE
15 years 10 months ago
2008
IEEE
The demand for real-time data services in embedded systems is increasing. In these new computing platforms, using traditional buffer management schemes, whose goal is to minimize ...
121
Voted
DSN
2007
IEEE
15 years 10 months ago
2007
IEEE
— Device scaling and large integration increase the vulnerability of microprocessors to transient errors. One of the structures where errors can be most harmful is the register ...