242 search results - page 16 / 49 » Computing bounds for fault tolerance using formal techniques |
IPPS
2000
IEEE
15 years 2 months ago
2000
IEEE
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
DFT
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
109
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ANNPR
2006
Springer
14 years 11 months ago
2006
Springer
Abstract. Recently, the authors described a training method for a convolutional neural network of threshold neurons. Hidden layers are trained by by clustering, in a feed-forward m...
RTCSA
2008
IEEE
15 years 4 months ago
2008
IEEE
Real-time systems typically have to satisfy complex requirements, mapped to the task attributes, eventually guaranteed by the underlying scheduler. These systems consist of a mix ...
83
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ICALP
1994
Springer
15 years 1 months ago
1994
Springer
We introduce a formal framework to study the time and space complexity of computing with faulty memory. For the fault-free case, time and space complexities were studied using the...