242 search results - page 19 / 49 » Computing bounds for fault tolerance using formal techniques |
95
Voted
CASES
2004
ACM
15 years 3 months ago
2004
ACM
A coarse-grain multithreaded processor can effectively hide long memory latencies by quickly switching to an alternate task when the active task issues a memory request, improving...
CLUSTER
2001
IEEE
15 years 1 months ago
2001
IEEE
Using multiple independent networks (also known as rails) is an emerging technique to overcome bandwidth limitations and enhance fault tolerance of current high-performance parall...
ISCA
2007
IEEE
15 years 4 months ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
SAC
2005
ACM
15 years 3 months ago
2005
ACM
This paper presents an efficient technique for placement and routing of sensors/actuators and processing units in a grid network. Our system requires an extremely high level of ro...
EMSOFT
2007
Springer
15 years 3 months ago
2007
Springer
The design of safety-critical systems has typically adopted static techniques to simplify error detection and fault tolerance. However, economic pressure to reduce costs is exposi...