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IPPS
2006
IEEE
15 years 9 months ago
Reducing the associativity and size of step caches in CRCW operation
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
M. Forsell
PARELEC
2006
IEEE
15 years 9 months ago
Hierarchical Partitioning for Piecewise Linear Algorithms
processor arrays can be used as accelerators for a plenty of data flow-dominant applications. The explosive growth in research and development of massively parallel processor arr...
Hritam Dutta, Frank Hannig, Jürgen Teich
SKG
2006
IEEE
15 years 9 months ago
Caribbean/Q: A Massively Multi-Agent Platform with Scenario Description Language
Making a truly useful massively multi-agent system is difficult since the actions of the full ensemble of agents cannot be controlled by designing just one agent. It is critical ...
Yuu Nakajima, Hironori Shiina, Shohei Yamane, Hiro...
CONEXT
2006
ACM
15 years 9 months ago
Towards a versatile transport protocol
In the context of a reconfigurable transport protocol, this paper introduces two protocol instances based on the composition and specialisation of the TFRC congestion control and...
Guillaume Jourjon, Emmanuel Lochin, Patrick S&eacu...
IWCMC
2006
ACM
15 years 9 months ago
Dynamic and automatic connection of personal area networks to the global internet
In the Next Generation Networks (NGNs) users will carry multiple devices forming cooperative networks known as Personal Area Networks (PANs). Some existing technologies enable thi...
Rui Campos, Manuel Ricardo