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FPL
2003
Springer
100views Hardware» more  FPL 2003»
15 years 8 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...
3DPVT
2002
IEEE
109views Visualization» more  3DPVT 2002»
15 years 8 months ago
A Hierarchy of Cameras for 3D Photography
We investigate the relationship between camera design and 3D photography, by examining the influence of camera design on the estimation of the motion and structure of a scene fro...
Jan Neumann, Cornelia Fermüller, Yiannis Aloi...
HPDC
2002
IEEE
15 years 8 months ago
A High-Performance Cluster Storage Server
An essential building block for any Data Grid infrastructure is the storage server. In this paper we describe a high-performance cluster storage server built around the SDSC Stora...
Keith Bell, Andrew A. Chien, Mario Lauria
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ICPR
2002
IEEE
15 years 8 months ago
Image Flows and One-Liner Graphical Image Representation
In this paper we introduce a novel graphical image representation comprising a single curve—the one-liner. The first step involves the detection and linking of image edges. We ...
Vadim Makhervaks, Gill Barequet, Alfred M. Bruckst...
IEEEPACT
2002
IEEE
15 years 8 months ago
Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning
This paper presents a new modulo scheduling algorithm for clustered microarchitectures. The main feature of the proposed scheme is that the assignment of instructions to clusters ...
Alex Aletà, Josep M. Codina, F. Jesú...