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ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 8 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
VLSID
2005
IEEE
147views VLSI» more  VLSID 2005»
16 years 5 months ago
Memory-Centric Motion Estimator
In the streaming video processing domain, the only way to meet strict performance and quality requirements and yet to provide the area- and power-wise optimal platform is to apply...
Aleksandar Beric, Ramanathan Sethuraman, Jef L. va...
ICIP
2002
IEEE
16 years 6 months ago
Fast text/graphics resolution improvement using wavelet based denoising and chain-code table lookup
We propose a fast text/graphics resolution improvement algorithm with boundary parameterization and wavelet based denoising. Given input images containing labeled text/graphics ob...
Onur G. Guleryuz, Anoop Bhattacharjya
DATE
2005
IEEE
135views Hardware» more  DATE 2005»
15 years 10 months ago
Compositional Memory Systems for Multimedia Communicating Tasks
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
CLEIEJ
2002
113views more  CLEIEJ 2002»
15 years 4 months ago
The MT Stack: Paging Algorithm and Performance in a Distributed Virtual Memory System
Advances in parallel computation are of central importance to Artificial Intelligence due to the significant amount of time and space their programs require. Functional languages ...
Marco T. Morazán, Douglas R. Troeger, Myles...