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ISCAS
2003
IEEE
91views Hardware» more  ISCAS 2003»
15 years 5 months ago
Real-time implementation of H.263+ using TI TMS320c6201 digital signal processor
In this paper, we use a digital signal processor (DSP) to implement a real-time H.263+ codec. We use fast algorithms to reduce the codec computational complexity. Furthermore, the...
Timothy K. Shih, Chia-Yang Tsai, Hsueh-Ming Hang
IPPS
2000
IEEE
15 years 4 months ago
MAJC-5200: A High Performance Microprocessor for Multimedia Computing
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
Subramania Sudharsanan
IPPS
2002
IEEE
15 years 4 months ago
Real-Time Communication for Distributed Vision Processing Based on Imprecise Computation Model
In this paper we propose an efficient real-time communication mechanism for distributed vision processing. One of the biggest problems of distributed vision processing, as is the ...
Hiromasa Yoshimoto, Daisaku Arita, Rin-ichiro Tani...
GLVLSI
2009
IEEE
146views VLSI» more  GLVLSI 2009»
15 years 3 months ago
A reconfigurable stochastic architecture for highly reliable computing
Mounting concerns over variability, defects and noise motivate a new approach for integrated circuits: the design of stochastic logic, that is to say, digital circuitry that opera...
Xin Li, Weikang Qian, Marc D. Riedel, Kia Bazargan...
JUCS
2008
167views more  JUCS 2008»
14 years 11 months ago
A Generic Architecture for the Conversion of Document Collections into Semantically Annotated Digital Archives
: Mass digitization of document collections with further processing and semantic annotation is an increasing activity among libraries and archives at large for preservation, browsi...
Josep Lladós, Dimosthenis Karatzas, Joan Ma...