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IPPS
2006
IEEE
15 years 10 months ago
Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
Grigoris Dimitroulakos, Michalis D. Galanis, Const...
IPPS
2002
IEEE
15 years 9 months ago
Scheduling Multiple Data Visualization Query Workloads on a Shared Memory Machine
Query scheduling plays an important role when systems are faced with limited resources and high workloads. It becomes even more relevant for servers applying multiple query optimi...
Henrique Andrade, Tahsin M. Kurç, Alan Suss...
DAC
2006
ACM
16 years 5 months ago
Leakage power reduction of embedded memories on FPGAs through location assignment
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
Yan Meng, Timothy Sherwood, Ryan Kastner
JVA
2006
IEEE
15 years 10 months ago
Features of Future Network Processor Architectures
As network applications are becoming increasingly sophisticated and internet traffic is getting heavier, future network processors must continue processing computation-intensive ...
Kyueun Yi, Jean-Luc Gaudiot
ASPLOS
2010
ACM
15 years 9 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...