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DAC
2011
ACM
14 years 4 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li
TRIDENTCOM
2006
IEEE
15 years 10 months ago
Characterizing energy consumption in a visual sensor network testbed
Abstract— In this work we characterize the energy consumption of a visual sensor network testbed. Each node in the testbed consists of a ”single-board computer”, namely Cross...
Cintia B. Margi, Vladislav Petkov, Katia Obraczka,...
ICPR
2004
IEEE
16 years 5 months ago
A Two-Stage Approach for Segmentation and Recognition of Handwritten Digit Strings Collected from Mail Pieces
In this paper, we present an approach to interpret handwritten digit strings by employing a two-stage segmentation and recognition scheme. The first stage processing is to deal wi...
Gyeonghwan Kim, Seon-Hwa Jeong, Sungwon Park, Yunh...
IJON
2006
189views more  IJON 2006»
15 years 4 months ago
Storing and restoring visual input with collaborative rank coding and associative memory
Associative memory in cortical circuits has been held as a major mechanism for content-addressable memory. Hebbian synapses implement associative memory efficiently when storing s...
Martin Rehn, Friedrich T. Sommer
ICPP
1993
IEEE
15 years 8 months ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...