SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Abstract— In this work we characterize the energy consumption of a visual sensor network testbed. Each node in the testbed consists of a ”single-board computer”, namely Cross...
Cintia B. Margi, Vladislav Petkov, Katia Obraczka,...
In this paper, we present an approach to interpret handwritten digit strings by employing a two-stage segmentation and recognition scheme. The first stage processing is to deal wi...
Gyeonghwan Kim, Seon-Hwa Jeong, Sungwon Park, Yunh...
Associative memory in cortical circuits has been held as a major mechanism for content-addressable memory. Hebbian synapses implement associative memory efficiently when storing s...
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...