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ICASSP
2010
IEEE
14 years 12 months ago
Buffer management for multi-application image processing on multi-core platforms: Analysis and case study
Due to the limited amounts of on-chip memory, large volumes of data, and performance and power consumption overhead associated with interprocessor communication, efficient managem...
Dong-Ik Ko, Nara Won, Shuvra S. Bhattacharyya
ICS
2003
Tsinghua U.
15 years 4 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
ASPDAC
2006
ACM
127views Hardware» more  ASPDAC 2006»
15 years 5 months ago
Memory size computation for multimedia processing applications
– In real-time multimedia processing systems a very large part of the power consumption is due to the data storage and data transfer. Moreover, the area cost is often largely dom...
Hongwei Zhu, Ilie I. Luican, Florin Balasa
TVLSI
2010
14 years 6 months ago
Computation Error Analysis in Digital Signal Processing Systems With Overscaled Supply Voltage
It has been recently demonstrated that digital signal processing systems may possibly leverage unconventional voltage overscaling (VOS) to reduce energy consumption while maintaini...
Yang Liu, Tong Zhang, Keshab K. Parhi