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166
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HPCA
2007
IEEE
16 years 4 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
146
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HPCA
2006
IEEE
16 years 4 months ago
2006
IEEE
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
116
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HPCA
2006
IEEE
16 years 4 months ago
2006
IEEE
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes p...
136
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HPCA
2004
IEEE
16 years 4 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
141
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HPCA
2003
IEEE
16 years 4 months ago
2003
IEEE
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...