The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
Im MPEG-21 Multimedia Framework Standard spielt das Digital Item als fundamentale Transaktions- und Austauscheinheit eine zentrale Rolle. Dieser Artikel beschreibt eine Methodik un...
A popular solution to internet performance problems is the widespread caching of data. Many caching algorithms have been proposed in the literature, most attempting to optimize fo...
Ganesh Santhanakrishnan, Ahmed Amer, Panos K. Chry...
The interesting properties of P2P systems (high availability despite peer volatility, support for heterogeneous architectures, high scalability, etc.) make them attractive for dist...