4401 search results - page 255 / 881 » Computing with Default Logic |
252
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POPL
2006
ACM
16 years 5 months ago
2006
ACM
This paper specifies, via a Hoare-like logic, an interprocedural and flow sensitive (but termination insensitive) information flow analysis for object-oriented programs. Pointer a...
145
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DSN
2007
IEEE
15 years 12 months ago
2007
IEEE
Programmable logic arrays (PLA), which can implement arbitrary logic functions in a two-level logic form, are promising as platforms for nanoelectronic logic due to their highly r...
170
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IPPS
2006
IEEE
15 years 11 months ago
2006
IEEE
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
146
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ACSC
2005
IEEE
15 years 11 months ago
2005
IEEE
The proposed Fuzzy Logic Controller (FLC) is a novel approach for dynamic buffer tuning at the user/server level. It eliminates buffer overflow by ensuring that the buffer length ...
140
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LPNMR
2005
Springer
15 years 11 months ago
2005
Springer
Two approaches to logic programming with probabilities emerged over time: bayesian reasoning and probabilistic satisfiability (PSAT). The attractiveness of the former is in tying ...