4401 search results - page 609 / 881 » Computing with Default Logic |
132
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DAC
2001
ACM
16 years 6 months ago
2001
ACM
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuit...
113
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DAC
2002
ACM
16 years 6 months ago
2002
ACM
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
126
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DAC
2002
ACM
16 years 6 months ago
2002
ACM
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
126
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DAC
2003
ACM
16 years 6 months ago
2003
ACM
Structuring and mapping of a Boolean function is an important problem in the design of complex integrated circuits. Libraryaware constructive decomposition offers a solution to th...
112
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DAC
2005
ACM
16 years 6 months ago
2005
ACM
Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control ...