Presented in this paper is a low-power architecture for turbo decodings of parallel concatenated convolutional codes. The proposed architecture is derived via the concept of block...
Seok-Jun Lee, Naresh R. Shanbhag, Andrew C. Singer
—In this paper, we will describe the close connection between the now celebrated iterative turbo decoding algorithm of Berrou et al. and an algorithm that has been well known in ...
Robert J. McEliece, David J. C. MacKay, Jung-Fu Ch...
— In this contribution we show how Shannon’s coding theory could be realized for Multiple-Input Multiple-Output (MIMO) channels with the aid of EXtrinsic Information Transfer (...
Abstract—A bit-node centric decoder architecture for lowdensity parity-check codes is proposed. This architecture performs the optimum sum-product algorithm. A bit node processin...
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...
We develop methods for analyzing and constructing combined modulation/error-correctiong codes (ECC codes), in particular codes that employ some form of reversed concatenation and w...
Jorge Campello de Souza, Brian H. Marcus, Richard ...