This paper deals with a common verification methodology and environment for SystemC BCA and RTL models. The aim is to save effort by avoiding the same work done twice by different...
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...
Many programs need to access data in a relational database. This is usually done by means of queries written in SQL. Although the language SQL is declarative, certain runtime erro...
We present HOMER, an observational-equivalence model checker for the 3rd-order fragment of Idealized Algol (IA) augmented with iteration. It works by first translating terms of the...
Abstract—Wireless networks (including wireless mesh networks) provide opportunities for using multiple paths. Multihoming of hosts, possibly using different technologies and prov...
Vicky Sharma, Koushik Kar, K. K. Ramakrishnan, Shi...