Sciweavers

1163 search results - page 224 / 233
» Concurrent Subspaces Analysis
Sort
View
MICRO
2007
IEEE
137views Hardware» more  MICRO 2007»
15 years 4 months ago
Implementing Signatures for Transactional Memory
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...
Daniel Sanchez, Luke Yen, Mark D. Hill, Karthikeya...
GECCO
2007
Springer
181views Optimization» more  GECCO 2007»
15 years 3 months ago
ACOhg: dealing with huge graphs
Ant Colony Optimization (ACO) has been successfully applied to those combinatorial optimization problems which can be translated into a graph exploration. Artificial ants build s...
Enrique Alba, J. Francisco Chicano
DATE
2006
IEEE
101views Hardware» more  DATE 2006»
15 years 3 months ago
Design with race-free hardware semantics
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
ISPASS
2006
IEEE
15 years 3 months ago
Considering all starting points for simultaneous multithreading simulation
Commercial processors have support for Simultaneous Multithreading (SMT), yet little work has been done to provide representative simulation results for SMT. Given a workload, cur...
Michael Van Biesbrouck, Lieven Eeckhout, Brad Cald...
ICRA
2005
IEEE
184views Robotics» more  ICRA 2005»
15 years 3 months ago
3D Virtual Prototyping of Home Service Robots Using ASADAL/OBJ
– Typical robot development requires that hardware be mostly functional before significant software development begins. Utilizing virtual prototype of hardware and its environmen...
Kyo Chul Kang, Moonzoo Kim, Jaejoon Lee, Byungkil ...