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DATE
2000
IEEE
132views Hardware» more  DATE 2000»
15 years 7 months ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
MTV
2005
IEEE
138views Hardware» more  MTV 2005»
15 years 9 months ago
Diagnosing Faulty Functional Units in Processors by Using Automatically Generated Test Sets
Microprocessor technology is increasingly used for many applications; the large market volumes call for cost containment in the production phase. Process yield for processor produ...
Paolo Bernardi, Ernesto Sánchez, Massimilia...
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
15 years 7 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
VLSID
2006
IEEE
94views VLSI» more  VLSID 2006»
15 years 9 months ago
On the Size and Generation of Minimal N-Detection Tests
The main result of this paper, proved as a theorem, is that a lower bound on the number of test vectors that detect each fault at least N times is N
Kalyana R. Kantipudi
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 7 months ago
Improving coverage analysis and test generation for large designs
State space techniques have proven to be useful for measuring and improving the coverage of test vectors that are used during functional validation via simulation. By comparing th...
Jules P. Bergmann, Mark Horowitz