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DATE
2000
IEEE
87views Hardware» more  DATE 2000»
15 years 8 months ago
Test Synthesis for Mixed-Signal SOC Paths
Higher levels of integration, the need for test re-use, and the mixed-signal nature of today’s SOC’s necessitate hierarchical test generation and system level test composition...
Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu
119
Voted
QSIC
2009
IEEE
15 years 10 months ago
From UML Statecharts to LOTOS: A Semantics Preserving Model Transformation
—A well-founded testing theory encourages the practical application of test case generation techniques. This aims at overcoming the ever increasing complexity of softwareenabled ...
Valentin Chimisliu, Christian Schwarzl, Bernhard P...
136
Voted
ICCAD
1996
IEEE
121views Hardware» more  ICCAD 1996»
15 years 7 months ago
Identification of unsettable flip-flops for partial scan and faster ATPG
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs
111
Voted
KBSE
2008
IEEE
15 years 10 months ago
Predicting Effectiveness of Automatic Testing Tools
—Automatic white-box test generation is a challenging problem. Many existing tools rely on complex code analyses and heuristics. As a result, structural features of an input prog...
Brett Daniel, Marat Boshernitsan
171
Voted
ICST
2009
IEEE
15 years 1 months ago
Euclide: A Constraint-Based Testing Framework for Critical C Programs
Euclide is a new Constraint-Based Testing tool for verifying safety-critical C programs. By using a mixture of symbolic and numerical analyses (namely static single assignment for...
Arnaud Gotlieb