4299 search results - page 313 / 860 » Concurrent Test Generation |
156
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ATS
2003
IEEE
15 years 10 months ago
2003
IEEE
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
134
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ASPDAC
2001
ACM
15 years 8 months ago
2001
ACM
Abstract--We present a processor-programmable built-in selftest (BIST) scheme suitable for embedded memory testing in the system-on-a-chip (SOC) environment. The proposed BIST circ...
120
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ECIS
2003
15 years 6 months ago
2003
One of the primary methods employed by researchers to judge the merits of new heuristics and algorithms is to run them on accepted benchmark test cases and comparing their perform...
152
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EURODAC
1995
IEEE
15 years 8 months ago
1995
IEEE
This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
135
Voted
TIT
2010
14 years 11 months ago
2010
In this work a method for statistical analysis of time series is proposed, which is used to obtain solutions to some classical problems of mathematical statistics under the only as...