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ASPLOS
2011
ACM
14 years 8 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...
159
Voted
ET
2010
122views more  ET 2010»
15 years 2 months ago
Fault Models for Quantum Mechanical Switching Networks
This work justifies several quantum gate level fault models and discusses the causal error mechanisms thwarting correct function. A quantum adaptation of the classical test set gen...
Jacob D. Biamonte, Jeff S. Allen, Marek A. Perkows...
203
Voted
PLDI
2011
ACM
14 years 7 months ago
Finding and understanding bugs in C compilers
Compilers should be correct. To improve the quality of C compilers, we created Csmith, a randomized test-case generation tool, and spent three years using it to find compiler bug...
Xuejun Yang, Yang Chen, Eric Eide, John Regehr
112
Voted
CDES
2006
80views Hardware» more  CDES 2006»
15 years 6 months ago
Communicating Distributed H systems with Simple Splicing Rules
In this paper we define communicating distributed H systems with simple splicing rules of types (1,3), (1,4) and (2,3) and study the generative capacity. keyword: Splicing systems,...
Kamala Krithivasan, Prahladh Harsha, Muralidhar Ta...
ESANN
2003
15 years 6 months ago
Comparison of neural algorithms for blind source separation in sensor array applications
- A test bed of experiments with real and artificially generated data has been designed to compare the performance of three well-known algorithms for BSS. The main goal of these ex...
Guillermo Bedoya, Sergio Bermejo, Joan Cabestany