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DAC
2003
ACM
16 years 6 months ago
A scalable software-based self-test methodology for programmable processors
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...
Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit D...
SEUS
2010
IEEE
15 years 3 months ago
Error Detection Rate of MC/DC for a Case Study from the Automotive Domain
Chilenski and Miller [1] claim that the error detection probability of a test set with full modified condition/decision coverage (MC/DC) on the system under test converges to 100%...
Susanne Kandl, Raimund Kirner
DAC
2005
ACM
15 years 7 months ago
VLIW: a case study of parallelism verification
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Li...
150
Voted
ASIACRYPT
1999
Springer
15 years 9 months ago
Linear Complexity versus Pseudorandomness: On Beth and Dai's Result
Abstract. Beth and Dai studied in their Eurocrypt paper [1] the relationship between linear complexity (that is, the length of the shortest Linear Feedback Shift Register that gene...
Yongge Wang
131
Voted
ASPDAC
1998
ACM
65views Hardware» more  ASPDAC 1998»
15 years 9 months ago
A Redundant Fault Identification Algorithm with Exclusive-OR Circuit Reduction
−This paper describes a new redundant fault identification algorithm with Exclusive-OR circuit reduction. The experimental results using this algorithm with a FAN-based test patt...
Miyako Tandai, Takao Shinsha