Sciweavers

3616 search results - page 113 / 724
» Conditional Memory Ordering
Sort
View
ETS
2007
IEEE
91views Hardware» more  ETS 2007»
15 years 11 months ago
PPM Reduction on Embedded Memories in System on Chip
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
Said Hamdioui, Zaid Al-Ars, Javier Jiménez,...
TPHOL
2007
IEEE
15 years 11 months ago
Operational Reasoning for Concurrent Caml Programs and Weak Memory Models
This paper concerns the formal semantics of programming languages, and the specification and verification of software. We are interested in the verification of real programs, wr...
Tom Ridge
ACII
2007
Springer
15 years 11 months ago
I Know What I Did Last Summer: Autobiographic Memory in Synthetic Characters
Abstract. According to traditional animators, the art of building believable characters resides in the ability to successfully portray a character’s behaviour as the result of it...
João Dias, Wan Ching Ho, Thurid Vogt, Natha...
ISSS
1996
IEEE
134views Hardware» more  ISSS 1996»
15 years 9 months ago
ADOPT: Efficient Hardware Address Generation in Distributed Memory Architectures
An address generation and optimization environment (ADOPT) for distributed memory architectures, is presented. ADOPT is oriented to minimize the area overhead introduced by the us...
Miguel Miranda, Francky Catthoor, Martin Janssen, ...
SSS
2010
Springer
128views Control Systems» more  SSS 2010»
15 years 3 months ago
On Transactional Scheduling in Distributed Transactional Memory Systems
We present a distributed transactional memory (TM) scheduler called Bi-interval that optimizes the execution order of transactional operations to minimize conflicts. Bi-interval c...
Junwhan Kim, Binoy Ravindran