3616 search results - page 118 / 724 » Conditional Memory Ordering |
166
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ESOP
2010
Springer
16 years 2 months ago
2010
Springer
Formal reasoning about concurrent programs is usually done with the assumption that the underlying memory model is sequentially consistent, i.e. the execution outcome is equivalen...
147
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ISCA
2009
IEEE
15 years 11 months ago
2009
IEEE
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
160
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PLDI
2012
ACM
13 years 7 months ago
2012
ACM
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...
171
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IPPS
1999
IEEE
15 years 9 months ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
202
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ASPLOS
2011
ACM
14 years 8 months ago
2011
ACM
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...