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ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
15 years 9 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
143
Voted
ISLPED
1995
ACM
112views Hardware» more  ISLPED 1995»
15 years 8 months ago
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors
Analog techniques can lead to ultra-efficient computational systems when applied to the right applications. The problem of associative memory is well suited to array-based analog ...
Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. ...
CLEIEJ
2002
113views more  CLEIEJ 2002»
15 years 4 months ago
The MT Stack: Paging Algorithm and Performance in a Distributed Virtual Memory System
Advances in parallel computation are of central importance to Artificial Intelligence due to the significant amount of time and space their programs require. Functional languages ...
Marco T. Morazán, Douglas R. Troeger, Myles...
ICC
2009
IEEE
135views Communications» more  ICC 2009»
15 years 2 months ago
A Discrete Channel Model for Capturing Memory and Soft-Decision Information: A Capacity Study
A discrete (binary-input 2q -ary output) communication channel with memory is introduced with the objective to judiciously capture both the statistical memory and the soft-decision...
Cecilio Pimentel, Fady Alajaji
DASFAA
2011
IEEE
250views Database» more  DASFAA 2011»
14 years 8 months ago
An FTL-Agnostic Layer to Improve Random Write on Flash Memory
Flash memories are considered a competitive alternative to rotating disks as non-volatile data storage for database management systems. However, even if the Flash Translation Layer...
Brice Chardin, Olivier Pasteur, Jean-Marc Petit