3616 search results - page 220 / 724 » Conditional Memory Ordering |
151
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DELTA
2004
IEEE
15 years 10 months ago
2004
IEEE
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
170
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FTCS
1996
15 years 7 months ago
1996
This paper presents a benchmark for dependablesystems. The benchmark consists of two metrics, number of catastrophic incidents and performance degradation, which are obtained by a...
195
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GIS
2006
ACM
15 years 6 months ago
2006
ACM
In this paper, we present an algorithm that performs simplification of large geographical maps through a novel use of graphics hardware. Given a map as a collection of non-interse...
162
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CAD
2000
Springer
15 years 6 months ago
2000
Springer
Very large and geometrically complex scenes, exceeding millions of polygons and hundreds of objects, arise naturally in many areas of interactive computer graphics. Time-critical ...
129
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ICST
2010
IEEE
15 years 4 months ago
2010
IEEE
Intermittent failures and nondeterministic behavior complicate and compromise the effectiveness of software testing and debugging. To increase the observability of software faults,...