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ICCD
2001
IEEE
98views Hardware» more  ICCD 2001»
16 years 2 months ago
In-Line Interrupt Handling for Software-Managed TLBs
The general-purpose precise interrupt mechanism, which has long been used to handle exceptional conditions that occur infrequently, is now being used increasingly often to handle ...
Aamer Jaleel, Bruce L. Jacob
LCTRTS
2007
Springer
15 years 11 months ago
Frequency-aware energy optimization for real-time periodic and aperiodic tasks
Energy efficiency is an important factor in embedded systems design. We consider an embedded system with a dynamic voltage scaling (DVS) capable processor and its system-wide pow...
Xiliang Zhong, Cheng-Zhong Xu
149
Voted
APLAS
2005
ACM
15 years 10 months ago
Transformation to Dynamic Single Assignment Using a Simple Data Flow Analysis
This paper presents a novel method to construct a dynamic single assignment (DSA) form of array-intensive, pointer-free C programs (or in any other procedural language). A program ...
Peter Vanbroekhoven, Gerda Janssens, Maurice Bruyn...
161
Voted
ISCA
1995
IEEE
109views Hardware» more  ISCA 1995»
15 years 8 months ago
Next Cache Line and Set Prediction
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
Brad Calder, Dirk Grunwald
BMCBI
2010
133views more  BMCBI 2010»
15 years 5 months ago
Stability analysis of the GAL regulatory network in Saccharomyces cerevisiae and Kluyveromyces lactis
Background: In the yeast Saccharomyces cerevisiae, interactions between galactose, Gal3p, Gal80p, and Gal4p determine the transcriptional status of the genes required for the gala...
Vishwesh V. Kulkarni, Venkatesh Kareenhalli, Pushk...