Sciweavers

3616 search results - page 293 / 724
» Conditional Memory Ordering
Sort
View
PLDI
1995
ACM
15 years 8 months ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
DCC
2009
IEEE
15 years 8 months ago
Out-of-Core Progressive Lossless Compression and Selective Decompression of Large Triangle Meshes
In this paper we propose a novel out-of-core technique for progressive lossless compression and selective decompression of 3D triangle meshes larger than main memory. Most existin...
Zhiyan Du, Pavel Jaromersky, Yi-Jen Chiang, Nasir ...
ACSC
2008
IEEE
15 years 6 months ago
An investigation of the state formation and transition limitations for prediction problems in recurrent neural networks
Recurrent neural networks are able to store information about previous as well as current inputs. This "memory" allows them to solve temporal problems such as language r...
Angel Kennedy, Cara MacNish
CF
2008
ACM
15 years 6 months ago
Multi-terabit ip lookup using parallel bidirectional pipelines
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
Weirong Jiang, Viktor K. Prasanna
ICCSA
2010
Springer
15 years 6 months ago
An Identifiable Yet Unlinkable Authentication System with Smart Cards for Multiple Services
The purpose of this paper is to realize an authentication system which satisfies four requirements for security, privacy protection, and usability, that is, impersonation resistanc...
Toru Nakamura, Shunsuke Inenaga, Daisuke Ikeda, Ke...