Sciweavers

3616 search results - page 337 / 724
» Conditional Memory Ordering
Sort
View
ICDE
2007
IEEE
127views Database» more  ICDE 2007»
16 years 5 months ago
Supporting Streaming Updates in an Active Data Warehouse
Active Data Warehousing has emerged as an alternative to conventional warehousing practices in order to meet the high demand of applications for up-to-date information. In a nutsh...
Neoklis Polyzotis, Spiros Skiadopoulos, Panos Vass...
DAC
2004
ACM
16 years 5 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
248
Voted
POPL
2008
ACM
16 years 4 months ago
High-level small-step operational semantics for transactions
Software transactions have received significant attention as a way to simplify shared-memory concurrent programming, but insufficient focus has been given to the precise meaning o...
Katherine F. Moore, Dan Grossman
136
Voted
EUROSYS
2007
ACM
16 years 1 months ago
Tashkent+: memory-aware load balancing and update filtering in replicated databases
We present a memory-aware load balancing (MALB) technique to dispatch transactions to replicas in a replicated database. Our MALB algorithm exploits knowledge of the working sets ...
Sameh Elnikety, Steven G. Dropsho, Willy Zwaenepoe...
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
16 years 1 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...