Sciweavers

3616 search results - page 341 / 724
» Conditional Memory Ordering
Sort
View
ICPP
2003
IEEE
15 years 9 months ago
A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches
Aggressive hardware-based and software-based prefetch algorithms for hiding memory access latencies were proposed to bridge the gap of the expanding speed disparity between proces...
Xiaotong Zhuang, Hsien-Hsin S. Lee
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
15 years 9 months ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue
PLDI
2010
ACM
15 years 9 months ago
Traceable data types for self-adjusting computation
Self-adjusting computation provides an evaluation model where computations can respond automatically to modifications to their data by using a mechanism for propagating modifica...
Umut A. Acar, Guy E. Blelloch, Ruy Ley-Wild, Kanat...
CCGRID
2002
IEEE
15 years 9 months ago
Overcoming the Problems Associated with the Existence of Too Many DSM APIs
Despite the large research efforts in the SW–DSM community, this technology has not yet been adapted widely for significant codes beyond benchmark suites. One of the reasons co...
Martin Schulz
VEE
2009
ACM
130views Virtualization» more  VEE 2009»
15 years 9 months ago
Post-copy based live virtual machine migration using adaptive pre-paging and dynamic self-ballooning
We present the design, implementation, and evaluation of post-copy based live migration for virtual machines (VMs) across a Gigabit LAN. Live migration is an indispensable feature...
Michael R. Hines, Kartik Gopalan