3616 search results - page 354 / 724 » Conditional Memory Ordering |
113
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DFT
2002
IEEE
15 years 9 months ago
2002
IEEE
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...
127
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RTSS
1994
IEEE
15 years 8 months ago
1994
IEEE
Various concurrency control algorithms di er in the time when con icts are detected, and in the way they are resolved. In that respect, the Pessimistic and Optimistic Concurrency ...
127
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ANSS
2004
IEEE
15 years 8 months ago
2004
IEEE
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
116
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HT
1991
ACM
15 years 7 months ago
1991
ACM
In order to combine hypertext with database facilities, we show how to extract an effective storage structure from given instance relationships. The schema of the structure recogn...
131
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AAAI
2007
15 years 6 months ago
2007
The paper presents and evaluates the power of best-first search over AND/OR search spaces in graphical models. The main virtue of the AND/OR representation is its sensitivity to ...