3616 search results - page 450 / 724 » Conditional Memory Ordering |
126
click to vote
CODES
2005
IEEE
15 years 9 months ago
2005
IEEE
This paper proposes a new efficient buffer management technique called shift buffering for automatic code synthesis from synchronous dataflow graphs (SDF). Two previous buffer man...
131
Voted
ICRA
2005
IEEE
15 years 9 months ago
2005
IEEE
- This paper presents a new control method to drive an array of wet Shape Memory Alloy actuators utilizing a Matrix Manifold and Valve system (MMV). The MMV architecture allows a v...
141
click to vote
RTAS
2005
IEEE
15 years 9 months ago
2005
IEEE
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
122
Voted
ICANN
2005
Springer
15 years 9 months ago
2005
Springer
Abstract. To generalize the Fisher Discriminant Analysis (FDA) algorithm to the case of discriminant functions belonging to a nonlinear, finite dimensional function space F (Nonli...
126
click to vote
PADS
2004
ACM
15 years 9 months ago
2004
ACM
We discuss an approach for creating a federated network simulation that eases the burdens on the simulator user that typically arise from more traditional methods for defining sp...