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DAC
2006
ACM
15 years 10 months ago
Exploring compromises among timing, power and temperature in three-dimensional integrated circuits
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...
Hao Hua, Christopher Mineo, Kory Schoenfliess, Amb...
TPDS
2010
174views more  TPDS 2010»
14 years 7 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
SIGCOMM
1999
ACM
15 years 1 months ago
Load-Sensitive Routing of Long-Lived IP Flows
Internet service providers face a daunting challenge in provisioning network resources, due to the rapid growth of the Internet and wide fluctuations in the underlying traffic pa...
Anees Shaikh, Jennifer Rexford, Kang G. Shin
DAC
2004
ACM
15 years 10 months ago
Placement feedback: a concept and method for better min-cut placements
The advent of strong multi-level partitioners has made topdown min-cut placers a favored choice for modern placer implementations. We examine terminal propagation, an important st...
Andrew B. Kahng, Sherief Reda
69
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ISCAS
2006
IEEE
104views Hardware» more  ISCAS 2006»
15 years 3 months ago
Average lengths of wire routing under M-architecture and X-architecture
— The X-architecture is a new integrated-circuit wiring technique in the physical design. Compared with the currently used M-architecture, which uses either horizontal or vertica...
S. P. Shang, Xiaodong Hu, Tong Jing