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ICCAD
2006
IEEE
119views Hardware» more  ICCAD 2006»
15 years 6 months ago
FastRoute: a step to integrate global routing into placement
Because of the increasing dominance of interconnect issues in advanced IC technology, placement has become a critical step in the IC design flow. To get accurate interconnect inf...
Min Pan, Chris C. N. Chu
DAC
1997
ACM
15 years 1 months ago
More Practical Bounded-Skew Clock Routing
: Academic clock routing research results has often had limited impact on industry practice, since such practical considerations as hierarchical buffering, rise-time and overshoot ...
Andrew B. Kahng, Chung-Wen Albert Tsao
ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
15 years 3 months ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
DAC
2008
ACM
15 years 10 months ago
Topological routing to maximize routability for package substrate
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...
CCR
2004
86views more  CCR 2004»
14 years 9 months ago
On the scaling of congestion in the internet graph
As the Internet grows in size, it becomes crucial to understand how the speeds of links in the network must improve in order to sustain the pressure of new end-nodes being added e...
Aditya Akella, Shuchi Chawla, Arvind Kannan, Srini...