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2005
Tsinghua U.
15 years 11 months ago
Improved automatic testcase synthesis for performance model validation
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
Robert H. Bell Jr., Lizy Kurian John
CASES
2004
ACM
15 years 11 months ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
ISCA
2010
IEEE
284views Hardware» more  ISCA 2010»
15 years 11 months ago
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address
Phase change memory (PCM) is an emerging memory technology for future computing systems. Compared to other non-volatile memory alternatives, PCM is more matured to production, and...
Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee
169
Voted
ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 11 months ago
Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis
We introduce a new approach, “Dynamic Common Sub-expression Elimination (CSE)”, that dynamically eliminates common sub- expressions based on new opportunities created during s...
Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Ni...
ICSE
1997
IEEE-ACM
15 years 10 months ago
Visualizing Interactions in Program Executions
Implementing, validating, modifying, or reengineering an object-oriented system requires an understanding of the object and class interactions which occur as a program executes. T...
Dean F. Jerding, John T. Stasko, Thomas Ball
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