Sciweavers

7189 search results - page 1228 / 1438
» Connecting Design with Code
Sort
View
137
Voted
POS
1998
Springer
15 years 8 months ago
Optimizing the Read and Write Barriers for Orthogonal Persistence
Persistent programming languages manage volatile memory as a cache for stable storage, imposing a read barrier on operations that access the cache, and a write barrier on updates ...
Antony L. Hosking, Nathaniel Nystrom, Quintin I. C...
ICSM
1997
IEEE
15 years 8 months ago
MORALE. Mission ORiented Architectural Legacy Evolution
Software evolution is the most costly and time consuming software development activity. Yet software engineering research is predominantly concerned with initial development. MORA...
Gregory D. Abowd, Ashok K. Goel, Dean F. Jerding, ...
FPL
1997
Springer
125views Hardware» more  FPL 1997»
15 years 8 months ago
VPR: A new packing, placement and routing tool for FPGA research
We describe the capabilities of and algorithms used in a new FPGA CAD tool, Versatile Place and Route (VPR). In terms of minimizing routing area, VPR outperforms all published FPG...
Vaughn Betz, Jonathan Rose
HPCN
1997
Springer
15 years 8 months ago
High Performance Simulation for Resonant-Mass Gravitational Radiation Antennas
Abstract. In this paper the design and validation of a high performance simulation is discussed that is of critical value to the feasibility study of the GRAIL project, the aim of ...
Jan F. de Ronde, G. Dick van Albada, Peter M. A. S...
116
Voted
EURODAC
1994
IEEE
129views VHDL» more  EURODAC 1994»
15 years 8 months ago
A general state graph transformation framework for asynchronous synthesis
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...
Bill Lin, Chantal Ykman-Couvreur, Peter Vanbekberg...
« Prev « First page 1228 / 1438 Last » Next »